Three-phase circuit analysis — Y, Δ, and the power triangle
Line vs phase, Y ↔ Δ conversion, P = √3·V_LL·I_L·cos θ, complex power S = V·I*, and PF correction with capacitors.
Step 1 — Balanced 3-phase set: V_LL = √3 · V_phase, with a 30° phase shift
Reference notes
Use Next → on the narrator above to walk through balanced three-phase circuit analysis: line vs phase quantities, Y and Δ connections, Y ↔ Δ conversion, and the power triangle that every load-flow study lives on.
The balanced 3-phase set
A balanced three-phase set has three phasors of equal magnitude, exactly 120° apart. Two voltages must be kept straight:
- Vphase (also VLN, line-to-neutral) — voltage from one phase conductor to the neutral.
- VLL (line-to-line) — voltage between two phase conductors.
Their relationship comes from phasor subtraction: Vab = Va − Vb, where Va and Vb are 120° apart and equal in magnitude. The phasor algebra gives:
On a 480 V Y system, Vphase = 480 / √3 ≈ 277 V. Nameplate voltages, transformer ratings, and exam problem statements default to VLL. Never read a 13.8 kV machine as 13.8 kV per-phase.
Y (star) connection
In a Y connection each phase impedance Z sits between a line and a common neutral point. The voltage across each impedance is Vphase; the current through each impedance is the line current.
Y is the standard for HV side of step-up transformers (each phase winding sees only VLL/√3, easing insulation) and for generators (where a neutral is needed for grounding through a resistor or reactor).
Δ (delta) connection
In a Δ connection each phase impedance sits between two lines — no neutral exists. The voltage across each impedance is VLL; the line current is the phasor sum of two phase currents meeting at the corner.
The dual symmetry between Y and Δ: where Y has √3 in voltages, Δ has √3 in currents.
Δ has no neutral. It's common on the LV side of distribution transformers (the closed delta loop captures triplen harmonics) and on motor windings. Step 3 of the animation shows the impedance loop and the phase / line current relationship.
Y ↔ Δ conversion
For a balanced load, converting between the two connections obeys:
Derivation: write the line current for each and force them to match when fed by the same source. The line current for Y is Vphase/ZY = VLL/(√3·ZY). The line current for Δ is √3·VLL/ZΔ. Setting them equal gives ZΔ = 3·ZY.
For unbalanced loads the general Y ↔ Δ conversion formulas are more involved (Kennelly's theorem). On the PE exam you'll mostly use the balanced form.
Three-phase power
The total three-phase real, reactive, and apparent power for a balanced load are:
where θ is the power-factor angle (between phase voltage and phase current). Power factor PF = cos θ = P / |S|.
These three quantities form the power triangle: P horizontal, Q vertical, S as the hypotenuse, θ as the angle.
- Lagging PF (Q > 0) — current lags voltage; inductive load (motors, transformers, fluorescent ballasts).
- Leading PF (Q < 0) — current leads voltage; capacitive load (capacitor banks, over-excited synchronous motors).
Worked example
A 500 kW load at 0.8 PF lagging on a 480 V (VLL) system:
- S = P / cos θ = 500 / 0.8 = 625 kVA
- Q = √(S² − P²) = √(625² − 500²) = 375 kVAR
- IL = S / (√3 · VLL) = 625 000 / (1.732 · 480) ≈ 752 A
Complex power S = V · I*
The complex form lets you keep P and Q in a single number. Define S = V · I* (current is conjugated). If V = |V|∠α and I = |I|∠β, then:
The conjugate is essential — without it, Q would have the wrong sign for inductive loads. The convention "Q > 0 for lagging" only works with S = V·I*.
Power factor correction
An inductive load has lagging PF and a positive Q. A capacitor bank in parallel supplies leading Q (negative Q). The capacitor's reactive power per phase is Q_cap = ω·C·V² (where ω = 2πf is the angular frequency and C is the capacitance). Net Q drops. P is unchanged. S = √(P² + Q²) shrinks, so line current I = S / (√3 · VLL) drops in proportion. Two consequences:
- Lower copper losses on the feeder: I²R losses fall as I².
- Lower utility demand charge: most large-customer rate schedules penalize PF below 0.90 or 0.95.
Target PF for industrial sites is typically 0.95 lagging (some utilities require 0.98). Over-correction past unity creates a leading PF, which utilities also penalize.
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- On step 6, click the + / − buttons on the canvas to add/remove capacitor kVAR and watch the triangle shrink.